Analysis on Radio-Frequency Modeling of Double- and Single-Gate Square-Shaped Extended Source TFETs

Document Type : Researsh Articles

Authors

• Saeid Marjani
• Seyed Ebrahim Hosseini

Ferdowsi university of Mashhad, Mashhad, Iran

10.22067/ess.v3i1.34295

Abstract

In this paper, the radio-frequency (RF) performances and small-signal parameters of double-gate (DG) square-shaped extended source tunneling field-effect transistors (TFETs) are investigated and compared with those of single-gate (SG) square-shaped extended source TFETs in terms of their cut-off and maximum oscillation frequencies and small-signal parameters. By using of a nonquasi-static (NQS) radio-frequency model, the small-signal parameters have been extracted. The results show that the DG square-shaped extended source TFET has higher transconductance, cut-off and maximum oscillation frequencies than single gate structure. The modeled Y-parameters are in close agreement with the extracted parameters for high frequency range up to the cut-off frequency. Results suggest that the DG square-shaped extended source TFETs seem to be the most optimal ones to replace MOSFET for ultralow power applications and RF devices.

Keywords

• Double-gate (DG)
• radio-frequency (RF)
• nonquasistatic (NQS)
• extended source
• tunneling field-effecttransistor (TFET)

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References

[1] A. M. Ionescu and H. Riel, “Tunnel field-effect transistors as energy-efficient electronic switches,” Nature, vol. 479, no. 7373, pp. 329–337, 2011.

[2] B. Rajamohanan, D. Mohata, A. Ali, and S. Datta, “Insight into the output characteristics of III-V tunneling field effect transistors,”J. Appl. Phys., vol. 102, pp. 092105-1–092105-5, 2013.

[3] P. Guo, Y. Yang, Y. Cheng, G. Han, J. Pan, Ivana, Z. Zhang, H. Hu, Z. X. Shen, C. K. Chia, and Y. Yeo, “Tunneling field-effect transistor with Ge/In0.53Ga0.47As heterostructure as tunnelingjunction,” J. Appl. Phys., vol. 113, pp. 094502-1–094502-9, 2013.

[4] S. Marjani and S. E. Hosseini, “Radio-frequency small-signal model of hetero-gate-dielectric p-n-p-n tunneling field-effect transistor including the charge conservation capacitance and substrate parameters,” J. Appl. Phys., vol. 118, pp. 095708-1–095708-8, 2015.

[5] T. Yu, J. T. Teherani, D. A. Antoniadis and J. L. Hoyt, “In0.53Ga0.47As/GaAs0.5Sb0.5 quantum-well tunnel-FETs with tunable backward diode characteristics,” IEEE Electron. Device Lett., vol. 34, no. 12, pp. 1503–1505, 2013.

[6] A. Vallett, S. Minassian, P. Kaszuba, S. Datta, J. Redwing and T. Mayer, “Fabrication and characterization of axially doped silicon nanowire tunnel field-effect transistors,” Nano Let., vol. 10, no.10, pp.4813–4818, 2010.

[7] G. Dewey, B. Chu-Kung, J. Boardman, JM. Fastenau, J. Kavalieros, WK. Liu, D. Lubyshev, M. Metz, N. Mukherjee, P. Oakey, R. Pillarisetty, M. Radosavljevic, HW. Then and R. Chau, “Fabrication, characterization, and physics of III–V heterojunction tunneling field effect transistors (H-TFET) for steep subthreshold swing,” in Proc. of IEEE International Electron Device Meeting (IEDM), Washington, DC, USA, pp.5–7, 2011.

[8] J. S. Lee, J. H. Seo, S. Cho , J. Lee , S. Kang, J. Bae, E. Cho, and I. M. Kang, “Simulation study on effect of drain underlap in gate-all-aroundtunneling field-effect transistors,” Current Appl. Phys., vol. 13, no. 6, pp.1143–1149, 2013.

[9] M Luisier, G Klimeck, “Simulation of nanowire tunneling transistors: From the Wentzel–Kramers–Brillouin approximation to full-band phonon-assisted tunneling,” J. Appl. Phys., vol. 107, no. 8, pp. 084507–084507-6, 2010.

[10] S. Koswatta, S. Koester, and W. Haensch, “On the possibility of obtaining MOSFET-like performance and sub60mV/dec swing in 1-D broken-gap tunnel transistors,” IEEE Trans. Electron. Devices, vol. 57, no. 12, pp. 3222–3230, 2010.

[11] G. Han, P. Guo, Y. Yang, L. Fan, Y. S. Yee, C. Zhan, and Y.-C. Yeo, “Source engineering for tunnel field-effect transistor: elevated source with vertical silicon-germanium/germanium heterostructure,” Jpn. J. Appl. Phys., vol. 50, no. 4, pp. 04DJ07-1–04DJ07-4, 2011.

[12] K. Ganapathi and S. Salahuddin, “Heterojunction vertical band-to-band tunneling transistors for steep subthreshold swing and high ON current,” IEEE Electron. Device Lett., vol. 32, no. 5, pp. 689–691, 2011.

[13] Q. T. Zhao, J. M. Hartmann, and S. Mantl, “An improved Si tunnel field effect transistor with a buried strained Si1−3Gex source,” IEEE Electron. Device Lett., vol. 32, no. 11, pp. 1480–1482, 2011.

[14] L. Britnell, R. V. Gorbachev, R. Jalil, B. D. Belle, F. Schedin, A. Mishchenko, T. Georgiou, M. I. Katsnelson, L. Eaves, S. V. Morozov, N. M. R. Peres, J. Leist, A. K. Geim, K. S. Novoselov, and L. A. Ponomarenko, “Field-effect tunneling transistor based on vertical graphene heterostructures,” Science, vol. 335, no. 6071, pp. 947–950, 2012.

[15] S. Richter, C. Sandow, A. Nichau, S. Trellenkamp, M. Schmidt, R. Luptak, K. K. Bourdelle, Q. T. Zhao, and S. Mantl, “Ω-Gated silicon andstrained silicon nanowire array tunneling FETs,” IEEE Electron. Device Lett., vol. 33, no. 11, pp. 1535–1537, 2012.

[16] K. Ganapathi, Y. Yoon, and S. Salahuddin, “Analysis of InAs vertical and lateral band-to-band tunneling transistors: leveraging vertical tunneling for improved performance,” Appl. Phys. Lett., vol. 97, no. 3, pp. 033504-1–033504-3, 2010.

[17] K-T. Lam, X. Cao, and J. Guo, “Device performance of heterojunction tunneling field-effect transistors based on transition metal dichalcogenide monolayer,” IEEE Electron. Device Lett., vol. 34, no. 10, pp. 1331–1333, 2013.

[18] K. Boucart and A. M. Ionescu, “Double-gate tunnel FET with high-k gate dielectric,” IEEE Trans. Electron. Devices, vol. 54, no. 7, pp. 1725–1733, 2007.

[19] R. Jhaveri, V. Nagavarapu, and J. Woo, “Effect of pocket doping andannealing schemes on the source-pocket tunnel field-effect transistor,”IEEE Trans. Electron. Devices, vol. 58, no. 1, pp. 80–86, 2011.

[20] H. Chang, B. Adams, P. Chien, J. Li, and J. C. S. Woo, “Improved subthreshold and output characteristics ofsource-pocket Si tunnel FET by the applicationof laser annealing,” IEEE Trans. Electron. Devices, vol. 60, no. 1, pp. 92–96, 2013.

[21] K. Kao, A. S. Verhulst, W. G. Vandenberghe, and K. De Meyer, “Counterdoped pocket thickness optimizationof gate-on-source-only tunnel FETs,”IEEE Trans. Electron. Devices, vol. 60, no. 1, pp. 6–12, 2013.

[22] N. Damrongplasit, S. H. Kim, C. Shin, and T. K. Liu, “Impact of gate line-edge roughness (LER) versus random dopant fluctuations (RDF) on germanium-source tunnel FET performance,” IEEE Trans. Nanotechnol., vol. 12, no. 6, pp. 1061–1067, 2013.

[23] G. Leung and C. Chui, “Stochastic variability in silicon double-gate lateral tunnel field-effect transistors,” IEEE Trans. Electron. Devices, vol. 60, no. 1, pp. 84–91, 2013.

[24] L. Lattanzio, N. Dagtekin, L. D. Michielis, and A. M. Ionescu, “On the static and dynamic behavior of the germanium electron-hole bilayer tunnel FET,” IEEE Trans. Electron. Devices, vol. 59, no. 11, pp. 2932–2938, 2012.

[25] Y. Yang, P. Guo, G. Han, K. L. Low, C. Zhan, and Y.-C. Yeo, “Simulation of tunneling field-effect transistors with extended source structures,” J. Appl. Phys., vol. 111, pp. 114514-1–114514-8, 2012.

[26] Kanungo, H. Rahaman, P. S. Gupta, and P. S. Dasgupta, “Extended source ultra-thin body double-gated tunnel FET,” in Proc. of 5th International Conference on Computers and Devices for Communication (CODEC), Kolkata, India, pp. 1–4, 2012.

[27] ATLAS Device Simulation Software, Silvaco Int., Santa Clara, CA, USA, 2012.

[28] W. Hansch, T. Vogelsang, R. Kirchner, and M. Orlowski, “Carrier transport near the Si/SiO2 interface of a MOSFET,” Solid State Electron.,vol. 32, no. 10, pp. 839–849, 1989.

[29] A. Schenk, “A model for the field and temperature dependence of SRH lifetimes in silicon,” Solid State Electron., vol. 35, no. 11, pp. 1585–1596, 1992.

[30] B. Ghosh and M. W. Akram, “Junctionless tunnel field effect transistor,” IEEE Electron. Dev. Lett., vol. 34, no. 5, pp.584–586, 2013.

[31] I. Kwon, M. Je, K. Lee, and H. Shin, “A simple and analytical parameter-extraction method of a microwave MOSFET,” IEEE Trans. Microwave Theory Tech., vol. 50, no. 6, pp. 1503–1509, 2002.

[32] S. Cho, J. S. Lee, K. R. Kim, B.-G. Park, J. S. Harris, Jr., and I. M. Kang, “Analyses on small-signal parameters and radio-frequency modeling of gate-all-around tunneling field-effect transistors,” IEEE Trans. Electron. Devices, vol. 58, no. 12, pp. 4164–4171, 2011.